By Francesc Moll
This booklet addresses major issues of interconnections on the chip and package deal point: crosstalk and simultaneous switching noise. Its orientation is in the direction of giving normal details instead of a compilation of functional circumstances. every one bankruptcy includes a checklist of references for the topics.
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Additional info for Interconnection Noise in VLSI Circuits
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2 Inductive models For still higher frequencies, line impedance is not purely resistive, but has a non-negligible AC component, and a line model with inductance is necessary. Conductance can be neglected up to a certain frequency limit, when the complete, more physical RLGC model is necessary. This will be valid while the physical quasi-TEM approximation is valid. In principle it is possible to consider a lumped RLC model, but, given the frequency range involved, it usually makes more sense to consider a distributed RLC model, with equations: These equations are wave equations for V and I, and they are therefore more accurate.